VLSI DESIGNING USING VERILOG CODING

A two day workshop has been organized at “Dronacharya College of Engineering” Gurgaon on 21st – 22nd Feb 14 on “VLSI DESIGNING USING VERILOG CODING” in coalition with JBTech INDIA.

This workshop was for the augmentation of the basic knowledge of VLSI and associated coding technique of students. There were 32 students and 3 faculty members (Ms. Amninder Kaur, Ms. Ashu Soni & Ms. Anshul Vats) who attended workshop. The students from other colleges also attended the workshop.

About JB Tech INDIA

JBTech INDIA is a VLSI Design solution and project training firm. The firm proffers industrial projects based training in advanced VLSI & Embedded system for aspiring and experienced engineers. Company has experienced people from industry, with vision of giving real time industrial exposure by working on projects and training involving innovative designs.

About the WORKSHOP

The grail of this workshop was to instigate the basic concepts VLSI Design using Verilog coding to the participants.

n the very first day, there was inaugural session. The HOD of ECE department “Dr. H.S Dua” welcomed all the participants. The workshop included lectures of VLSI Introduction, its use and its applications in real world. There was a interactive lecture by Mr. Rajiv Ranjan, Industry Expert, who elucidated the students about the ASIC Design flow in which he covered the basic introduction, front end flow, design specification, RTL coding verification and synthesis. Then he gave the basic introduction about Linux. After that there was a lab session of Verilog language syntax and semantics linux.

On the second day, there was a practical session on Verilog coding for sequential circuits. In the lab session, Verilog RTL coding, writing programs and simulation was practised. Students made different minor projects on combinational circuits such as half adder, full adder, multiplexer and de-muxs. The implementation of different commands of Verilog like move directory, make directory, remove directory, copy, list, clear & exit etc was undertaken. After that, there was mini project competition. Six students bagged the best project award (list attached).

JBTech India has offered 6 weeks free training to the winners of the project competition .The workshop concluded with valedictory function and distribution of certificates. Overall the workshop has been very useful in all aspects of VLSI designing.